Re: ANN: SwiftX for ARM and i386

On Fri, 21 Nov 2003 07:20:18 GMT, [EMAIL PROTECTED] (42Bastian
Schick) wrote:

>>> 1) The data bus is 8 or 16 bits wide
>Also with 32bit => 2 insn per fetch. Many ARM based CPU have at least
>a small cache for this.
The performance trade off is simply number of instructions
versus execution rate

>>> 2) There is no instruction cache
>Even with. Twice (ok, 1.9 times) as many instructions fit into it.
True. Cache behaviour and benefits are very dependent on the
application domain. In our domains, branches are very common
and data memory traffic (unaffected by Thumb to a first order)
then affects performance.
>
>>> 3) Instruction memory space is limited.
>*lol* the we-have-megas-of-memory-so-we-dont-care-for-code-size
>argument.
>This can't be beaten.
That's not what I said. Most of our applications fit in
what are now small/cheap Flash devices with plenty to
spare. Note also the tendency to copy code into RAM
for execution since RAM is often much faster than Flash.

When benchmarking code for ARMs, my conclusion is that
there is no substitute for setting up the hardware and
*measuring* the performance of a piece of code.

Please note that these remarks were in part prompted by
conversations with several FAEs who said that most of their
customers were not excited by Thumb.

>>Can you explain why Thumb is not important in your apps?  Is it because
>>with features like TCP/IP you are already using enough memory that Thumb
>
>If this would be his argument, it is a poor one, because he would
>benefit from compiling the TCP/IP stack to thumb code.
Our complete web server app with multithreaded Telnet and HTTP
plus CGI and ASP fits into about 110k of code space.

I really must get enough spare time to write the VFX Thumb code
generator ...

Stephen

--
Stephen Pelc, [EMAIL PROTECTED]
MicroProcessor Engineering Ltd - More Real, Less Time
133 Hill Lane, Southampton SO15 5AF, England
tel: +44 (0)23 8063 1441, fax: +44 (0)23 8033 9691
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