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Thanks for the reply. I need estimates at 500 MHz and 1GHz.Voltage :1.2 volts. CMOS process. The circuits I am interested in are for a 5 bit data path. 1.adder 5 by 5 bit CLA adder. 2.FIFO 5 bit and length is 36 3.SRAM cell of size 128 elements. each is 5 bit wide. 4.a simple register of 5 bit word. Regards, Choudhary "Kelvin" <[EMAIL PROTECTED]> wrote in message news:<[EMAIL PROTECTED]>... > You may rephrase your question more specific, for example, > > Given at 20MHz & 0.13um CMOS, what is the estimated power, area of an 8*8 > adder/multiplier, an 8*128 FIFO, etc... > Experienced engineers may tell you some rough estimate... > > Kelvin > > > > > "Choudhary" <[EMAIL PROTECTED]> wrote in message > news:[EMAIL PROTECTED] > > Hi, > > Could you please let me know where can I get quick > > estimates/approximate analytical formulae of power,delay and area of > > typical VLSI circuits such as (adders,mutipliers FIFOs ,SRAM )? > > > > The process is 0.13 micron. > > > > Regards, > > Choudhary
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