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Andrew, Thanks for the help. Yes, it has been a while and it is a delight to still be able to use this group as the fantastic resource it is. In case you wondered, Andrew, the full custom chip I was working on when I was a very active member of this group before was a great success, and I am now working towards another (a PLL if you hadn't guessed yet!). Keep up the good work! Cheers Reuben "Andrew Beckett" <[EMAIL PROTECTED]> wrote in message news:[EMAIL PROTECTED] > Reuben, > > It's been a while! I was only thinking the other day I'd not seen any posts > from you for a while. > > Check out http://www.designers-guide.com as there is a good paper on > PLLs there (for phase noise/jitter). This talks about using phase-domain > modelling of a PLL having characterised it with SpectreRF. > > There's also some stuff on the PLL library documented in cdsdoc. > > Simulating it directly in SpectreRF is not so easy, but check Ken Kundert's > paper above as it describes the issues well (not surprising since he's > the architect of Spectre and SpectreRF). > > Regards, > > Andrew. > > On Tue, 25 Nov 2003 10:08:00 -0000, "R Wilcock" <[EMAIL PROTECTED]> > wrote: > > >Hi all, > > > >I was wondering if anyone had had any success or could suggest a method for > >using SpectreRF to derive a frequency response for a PLL? What I want is a > >loop (open and closed) gain versus frequency plot. > > > >Cheers > > > >Reuben > > > > -- > Andrew Beckett > Senior Technical Leader > Custom IC Solutions > Cadence Design Systems Ltd
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