Re: 1teraflops cell processor possible?

On Fri, 28 Nov 2003 19:39:34 +0100, Jan C. Vorbrüggen wrote:

>> It doesn't help that I've been presented with two apparently
>> contradictory arguments (Andrew Reilly):
> 
> Not contradictory at all - we both are saying that those (parts of)
> algorithms that can be modified to suit a streaming architecture, already
> run exceedingly well - at light speed of the FUs, basically - on current
> hardware; so what is the point of developing streaming hardware?

To got that little bit further:

What is the point of developing streaming hardware that is *known* to not
be able to support any of the existing applications in full, because
they all require operations that don't look like streaming.  As a
precursor to streaming hardware, you need streaming software.  That
streaming software *could* be written now, if it were possible, and it
would run on the current crop of MPP hardware (significantly) faster than
whatever the software is doing at the moment, because it would put lower
pressure on the communications links.

Robert seems to be arguing: build the hardware anyway, and the software
will have to follow.  Sorry, but that's how to build a white elephant.

Let's look from a different angle:

Posit a reconfigurable systolic array: a streaming architecture for want
of a better name.  A sea of functional units with little or no storage
between them.  To be sufficiently configurable to do a useful variety of
things, you want each of these FUs to be able to do a variety of different
things, otherwise you have to spend bulk wire costs, building connections
between function-specific FUs.  In fact, you get benefit from allowing
each FU to do several things to each data item before it is passed on, as
you said.  To allow an FU to do several things in sequence, you give it an
instruction set and a program.  To let it combine several streams and
iterate over several operations, you give it some scratch-pad RAM.  Sounds
like Blue Gene (or any of the several MPP-on-a-chip designs that have been
posited and built before).  This is all just good engineering design, *if*
you have code that can support it.  Look at the current crop of processor
chips that go into mobile phone base stations.  Some of them look exactly
like that.

-- 
Andrew