Re: 1teraflops cell processor possible?

In article <[EMAIL PROTECTED]>,
Rupert Pigott <[EMAIL PROTECTED]> wrote:
>>
>> >The advantage of using stuff you already have to hand
>> >when you're working on something new is that it's a known
>> >quantity, it's almost certainly cheaper in the short-term
>> >(important if you have limited funding), and it allows you
>> >to prototype more, erm, accurately...
>>
>> This is NOT true!  It is very often cheaper to start from scratch,
>> and often makes prototyping easier.  It is common for a project
>
>That's a pretty strong assertion Nick. Let's take a look
>at the options open to the guys looking for a core for
>their spiffy new MPP :
>1) Design a new core & bring up a new simulator from
>scratch.
>2) Utilise a standard core that has been stuffed into
>many ASICs that has a bunch of simulators and libraries
>already tested and implemented.
>
>Option #2 Definately looks easier for your common or
>garden prototyper. This was what INMOS saw when they
>embarked upon the RMC before SGS bought them. A friend
>of mine whom I lived with for a few months was one of
>the guys behind that particular re-usable core.

Yes and no.  Firstly, "very often" does not mean "usually".  What
I was disputing was it is "almost certainly" cheaper to reuse.
I would be happy with "usually"!

I fully agree that you should always CONSIDER reusing, but that
doesn't mean that it should be an almost preordained conclusion.
Also, there are many other options, such as:

3) Reuse the ALUs, FPUs, etc. but rethink the way that they are
plugged together.

For example, starting from the position that either HP or Intel
was with the IA-64, there is no reason not to consider a totally
interrupt-free design.  Did they?  If not, why not?  It certainly
could be done - subject to the (mild) constraints I have described
before.


Regards,
Nick Maclaren.