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Paul Pluzhnikov <[EMAIL PROTECTED]> wrote:
> Terje Mathisen <[EMAIL PROTECTED]> writes:
>
>> I'd love to see the generated IA64 asm!
>
> I don't have Intel compilers, but here are 'g++ -O3' and (HP) 'aCC +O3'
> results from
I've got the Intel 7.1 compiler set for Itanium. For the same code,
I get the following assembly (using "ecc -S -O3"):
_ZN3Foo4funcEj:
{ .mii
alloc r10=ar.pfs,2,0,0,0 //0: 6 30
add r8=0,r0 //0: 7 6
nop.i 0 ;;
}
{ .mib
cmp4.gtu.unc p7,p0=1,r33 //1: 7 4
nop.i 0
(p7) br.cond.dpnt .b1_4 ;; //1: 7 5
// Block 2: Pred: 0 Succ: 4 3 -G
// Freq 5.0e-01, Prob 0.50
}
{ .mmi
ld4 r2=[r32] ;; //0: 7 7
cmp4.gtu.unc p6,p0=r33,r2 //1: 7 8
nop.i 0
}
{ .mib
nop.m 0
nop.i 0
(p6) br.cond.dpnt .b1_4 ;; //1: 7 9
// Block 3: Pred: 2 Succ: 4 -G
// Freq 2.5e-01, Prob 1.00
}
{ .mii
add r8=1,r0 //0: 7 10
nop.i 0
nop.i 0 ;;
// Block 4: exit Pred: 2 0 3 Succ: -GO
// Freq 1.0e+00, Prob 1.00
}
.b1_4: // emit lab 1
{ .mib
nop.m 0
nop.i 0
br.ret.sptk.many b0 ;; //0: 7 12
}
--
Bjørn-Ove Heimsund
Centre for Integrated Petroleum Research
University of Bergen, Norway
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