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Re: 400 Mb/s ADC



On a sunny day (Thu, 20 Nov 2003 00:06:40 -0500) it happened "MM"
<[EMAIL PROTECTED]> wrote in <[EMAIL PROTECTED]>:

>> yes, repacking might allow a 64/66 PCI to accept the data. i worry
>> that we will spend lots of time and money, but the margin will be
>> insufficient for it to actually work.  i have heard that some PCI
>> cores are not too efficient.
>
>Spend money and time on what? With regards to PCI, I am pretty sure it will
>work. You can ask PCI crowd on the PCI mailing list
>(http://www.pcisig.com/developers/technical_support/pci_forum), they will
>tell you for sure.And it doesn't have to be a core, you could use an
>industry proven silicon, e.g. from PLX. I would be more worried about
>processing all this data in your PC. I don't think any PC can do FFT's while
>keeping up with such a data flow. Let's say you want to do 1024 point FFT.
>At  400 MSPS it will take only 2.56 us to accumulate a new block of data.
>The latest and greatest ADI ADSP-TS201S can do a 1024-point complex FFT time
>in 16.8 microseconds. I doubt any of the Intel chips can do it faster.
>AFAIK, TI DSP's aren't faster either. So, in my opinion you will either need
>an array of fast DSP's or some sort of FPGA based processing. Trying to do
>this kind of processing in host doesn't sound feasible to me.
>
>
>/Mikhail
>
>
A little while ago in sci.crypt there was some talk about the first optical processor.
Basically this is an LED array with multipliers that can do 125 million complex 128 
point
FFT or 500000 DFT 16 K size per second.
http://www.lenslet.com/newsItem.asp?showArchive=&newsId=184
www.lenslet.com
The thing itself is a normal DSP with the optical array (you can buy that separately 
too).
Normal logic, if you interfaced a FPGA you could go faster perhaps, those gallium
arsenide LEDS switch at  20 GHz...
No idea what it costs, perhaps less then you think.
Download the datasheet .pdf, maybe it is of use...
JP



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