Re: Minimal write-only slave PCI board?

Your board needs to be able to handle the PCI stuff that the
PCI bios expects, like the vendor ID, code, and subcode, and
the amount of resources available. Trying to do it with a minimal
amount of discrete components isn't going to work very well.

A simple (from a hardware design standpoint) board could just
be a single FPGA with maybe a buffer chip on the output. This
would be just about a single chip solution, but it is going to require
some FPGA programming.

Another relatively simple solution is to use something like a
PLX 9052, which will give you a local bus output. One of the
options for the 9052 is ISA mode, which you could then
interface to an 8255. The PLX will do the address decoding, so
you wouldn't need an address decoder chip like you normally
would for am 8255. The only programming you have to do is
set up the vendor ID, code, subcode, and address ranges, which
can be done from a simple configuration file and some dos programming
software. The PLX needs a small serial eprom. This would be a 3
chip solution with a lot less programming than the FPGA approach.

Both boards would be relatively inexpensive to produce.

I know you can get PCI interface chips with a bunch of different
things built into them, such as a dual port ram or an ethernet interface
or a modem. I'm not aware of a TTL output version just off the top
of my head, but I bet you can find one if you search. This would be
almost a 1 chip solution like the FPGA, but would require a lot less
programming on your part. It probably wouldn't be very expensive
either, but the FPGA and PLX chips are produced in such massive
quantities that they are pretty cheap.

--
Mark Sokos
Electrical Engineer, Computer Geek (er, programmer),
and no talent bum musician


"Mike" <[EMAIL PROTECTED]> wrote in message
news:[EMAIL PROTECTED]
> Hi!
> I'd like to make a PCB for a minimal, write-only slave PCI
> board, just to output some data.
>
> I thought about the following, to reach the "minimal" goal:
>
> Use only addresses, do not perform a full data write cycle.
>
> If I choose an address range, e.g.:
>
> 0xABCDxxxx where ABCD addresses the board, and xxxx is my data,
> by intercepting the 0xABCD part of the PCI bus I may latch the
> rest of the address, that will be my data.
>
> At the PC side, it will mean that any write at the address
> 0xABCDxxxx will send the data xxxx to my board.
>
> Is this doable?
>
> What should I do/need exactly to implement the above?
>
> Thanks a lot!!
> Mike
>