Re: Slightly unmatched UART frequencies

you guys seem to miss the point.. Async RS232 ALWAYS has mismatched clocks
... ALL async UARTs MUST be capable of handling this.. that's why there's
flow control.

You will find that 99.9% of them start looking for the start bit 1/2 way
thru the stop bit.  If you want to build a repeater then you will need a
fractional stop bit generator OR you can over spec the crystal by 1.5%  (or
the baud rate generator) OR you add RTS / CTS flow control like everybody
else.

Simon

"valentin tihomirov" <[EMAIL PROTECTED]> wrote in message
news:[EMAIL PROTECTED]
> Error accumulates. 1% means that receiver accepts 9.9bit long farmes while
> transmitter transmits 10.0 bit-long frames. After re-transmitting 100
bytes
> (frames) we get 10-bit error. 10 bit is one byte, so 1-byte buffer is not
> enaught. The longer the stream the lager the buffer required. Infinite
> buffer is required for continous stream. As masters stated, UART was not
> designed for this purpose.
>
>
>