Re: [VirtexII + DCM + newbie] problems with the clocksignals from DCM

"Yttrium" wrote:

> indeed indeed, i think the main problem was getting used to the fact that
> VHDL is a programming language but it designs hardware.

Well, technically it is an HDL ... "Hardware Description Language".  The
trick is to not think "sofware" at all and think that you are describing
hardware constructs.  That alone should keep you honest.

> i couldn't use the solution with the ce FF because the system clock is on
> the same clock as on of the output clock signals from the DCM so that
would
> have divided the frequency by 2.


I'm not sure I follow this without having more context in terms of what the
design is attempting to do.


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Martin Euredjian

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