Hi
All,
I am trying to synthesise the Xilinx example "ping" PCI LogiCORE using
Synplify Pro 7.0 and Xilinx ISE 5.2.
I operate Synplify as detailed in the LogiCORE PCI Implementation Guide,
and then start the ISE Project Navigator to implement the design. ISE fails at
the translate stage with the output shown at the bottom of this post.
I am unclear as to where the error is in this process. The second launcher
message about PCI_LC_I.ngo seems a bit suspect, but does not seem to be an
error.
I would appreciate any help that anyone could give me on getting past this.
I'm more than a little bit puzzled after playing with all the options I can
find to no avail.
Regards,
Dean Armstrong.
Started process "Translate".
Command Line: ngdbuild -quiet -dd
e:\working\wireless\vhdl\pci\ping\synthesis/_ngo -uc
E:/working/wireless/vhdl/pci/xc2s100fg456_32_33.ucf -sd
E:\working\wireless\vhdl\pci\vhdl\src\xpci -p xc2s100-fg456-6 pcim_top.edf
pcim_top.ngd
Launcher: "pcim_top.ngo" is up to date.
Reading NGO file
"e:/working/wireless/vhdl/pci/ping/synthesis/_ngo/pcim_top.ngo"
...
Reading component libraries for design expansion...
Launcher: The
source netlist for "PCI_LC_I.ngo" was not found; the current NGO
file will
be used and no new NGO description will be compiled. This probably
means
that the source netlist was moved or deleted.
abnormal program termination
ERROR: NGDBUILD failed
Reason:
Completed process "Translate".