Re: area constraints

"Martin Euredjian" <[EMAIL PROTECTED]> wrote in message news:<[EMAIL PROTECTED]>...
> "A.y" wrote:
> 
> > 1. Can i assign flexible area constraints to individual modules in a
> design..
> 
> Depends on your definitions of "flexible", but, yes, you can identify all
> the logic for a given module and assign an area constraint to it.
> 
> > i mean, can i say a module shud fit in this much area of some shape ..
> 
> You can't say that a module "should fit" a given area.  What you say is
> something like "don't put logic for this module outside of this area".  

hello,

  yes i guess these were the better words ..
but still, whether the tool really doesn't put the logic outside the
area ?

The
> area has to be large enough for the grouped logic.  Easiest way to find out
> is to use the Floorplanner to gather the logic you want to constrain.  While
> creating the area constraint graphically, it will tell you what percentage
> of the selected logic fits within the rectangle you are defining.
> 

thank you very much for all explanation but ..

> > without specifying absolute slice locations in area group ? .. and
> Well, you do define an area within the chip.  Not sure what you mean here.

this was infact the "main" doubt that can i constrain the module
within a area ..
something like an rpm .. but not specify the coordinates of origin ..
and definitely
not the relative LOCS .. don't know how much it cud be better/worse
information to
the placement algorithm than other styles (rpm/area groups)!

> If you want something that will maintain a given layout as you move it about
> a chip you have to use RPMs.  Even then, crossing certain boundaries gets
> complicated (embedded multiplier columns).
>

i think rpms can cross such boundary.. not very sure .. my manually
created rpm crossed it!

> > 2. can structures other than rectangle be specified ?
> 
> Sure, you can specify multiple rectangles to form other shapes.
was not aware of that.. thanks a lot :)

--ay