Re: How many dedicated clock pins EP20K1500EBC652 device?

[EMAIL PROTECTED] (enq_semi) wrote in message news:<[EMAIL PROTECTED]>...
> How many dedicated clock pins are there for EP20K1500EBC652 device? 
> 
> I only found clk1p,clk2p,clk3p,clk4p (Pin w34, u2, y34, t2) are
> dedicated clock pins. However, clk1p and clk2p are connected together,
> clk3p and clk4p are connected together; So I can only have two
> different clock signals drive the internal clock trees.
> 
> According to APEX 20K Programmable Logic Device Family Data Sheet,
> there are "up to eight global clock signals" in the APEX 20K device.
> How many are there for EP20K1500 device and how can I have more than
> two different external clocks to drive the different internal clock
> trees?
> 
> thanks,
> 
> Yi Zhang
> ENQ Semi

Hi Yi,

The APEX 20K has 8 dedicated, high speed global resources.
4 are dedicated clocks -- they are normally used only to route clocks.
Another 4 are "dedicated fast resources" or "fast clocks."  They are
used to route either clocks or other high-fanout signals, like
asynchronous clears.

The two resources aren't much different.  The dedicated clocks are
driven by dedicated input pins, while the fast dedicated networks can
be driven by bidirectional IOs or internal signals from the FPGA
fabric.  So most people just consider this 8 dedicated clocking /
asynchronous clear networks.

clk1p and clk2p aren't connected together, so you can send 4 signals
in through the dedicated clock pins.

The FAST pins drive the dedicated FAST networks, which can be used as
another 4 clock networks:

network  Driving pin
FAST1    B19
FAST2    B17
FAST3    AP19
FAST4    AP17

Hope this helps.

Vaughn
Altera