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Re: any FPGA design for video frame memory control?



None that I am aware  of, but it is not a difficult design to do.  If
using SDRAM, you get the best performance by using fixed length bursts
(8 beat) and rotating the banks every 8 pixels to hide the precharge.

Wang Feng wrote:

> Are there any reference designs for video frame memory control logic
> to work with Philips SAA7111 decoder?
>
> email to [EMAIL PROTECTED]
>
> Thanks,
>
> Wang, Feng

--
--Ray Andraka, P.E.
President, the Andraka Consulting Group, Inc.
401/884-7930     Fax 401/884-7950
email [EMAIL PROTECTED]
http://www.andraka.com

 "They that give up essential liberty to obtain a little
  temporary safety deserve neither liberty nor safety."
                                          -Benjamin Franklin, 1759





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