Re: XC9500 design does not fit into Coolrunner

Have you considered other vendors?

Lattice makes several devices that will go beyond 512 Macrocells.
Also, their 5kve and XPLD family have 68-inputs into the macrocell blocks
which should make fitting easier.

Dan
"Uwe Bonnes" <[EMAIL PROTECTED]> wrote in message
news:[EMAIL PROTECTED]
> Klaus Falser <[EMAIL PROTECTED]> wrote:
> : Hello,
>
> : I have a rather large design for a XC95288XL which consumes 276
macrocells
> : of 288 possible.
> : Since Xilinx seems to prefer Coolrunner devices to the good old XC9500's
> : I tried to stuff the design into a Coolrunner II chip to look how it
> : would behave.
>
> Did you play with the fitter options?
>
> : However, I was not able to make it fit even in a 512 macrocell device.
> : Timing should not be so tight, it has to run at 8 MHz clock, but the
> : timing analyzer gives me 17-18 MHz on the slowest 10 ns device.
>
> The Macrocell of the XC2 is not as wide as the cell of the XC95X(V), so
some
> logic may need expansion on two cells.
>
> : Can anybody which know's the XCR2 better than me give me a hit where
> : to pay attention?
> : How can I see from the report where the fitter has a problem?
>
> Did you look look at the *.rpt files?
>
> Bye
> --
> Uwe Bonnes  [EMAIL PROTECTED]
>
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