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Mark, Thanks a lot for your help. I had the same problem: the leads to the board were to long (I made a PC3 on my own). So I shortened it (to about 10cm), took a parallel port extension cable and it works fine. Thank you and the other supporters once more... Kay "Mark van de Belt" <[EMAIL PROTECTED]> schrieb im Newsbeitrag news:[EMAIL PROTECTED] > Hello, > > I had the same problem with the same two chips. There were 13 devices on the > my board. I used long leads (20 cm) from the PC3 to the board. After > shortening both the parallel port cable (I used a 1.5 M 1:1 extension cable > between the parallel port and the PC3 cable) and the leads to the board (to > 5 cm) the problem was solved. > > Mark > > > "Kay Schubert" <[EMAIL PROTECTED]> schreef in bericht > news:[EMAIL PROTECTED] > > Hi, > > > > I designed a FPGA prototyping board with a Spartan XC2S200E and a XC18V02 > > PROM. > > To configure these devices I put a JTAG header on the board and routed it > as > > described in > > the following Xilinx datasheet: > > http://toolbox.xilinx.com/docsan/xilinx4/data/docs/pac/designing7.html > > > > At the software-side I use impact and the PC3 from Xilinx. When I start > > impact in boundary-scan mode, > > the PC3 will be detected (as [EMAIL PROTECTED]) and the boundary-scan chain will > > be identified. But there's the problem: > > impact always detects 11 devices in the chain, but there are only two. > > And: Even though the two devices are original Xilinx parts, no ID codes > were > > returned (or better: the returned codes > > don't match with Xilinx parts). > > > > I checked the configuration connections and the power supply, but > > everything seems to be o.k. Has anybody of you an idea what the problem > > could be? > > > > thanks, Kay > > > > > > > --- > Outgoing mail is certified Virus Free. > Checked by AVG anti-virus system (http://www.grisoft.com). > Version: 6.0.538 / Virus Database: 333 - Release Date: 10-11-2003 > >
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