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All, The power estimate is only as good as your simulation vectors, and their length. Short sims, few vectors = bad estimate. Austin John Blaine wrote: > Praveen, > > It is difficult to estimate how much impact this will have on the power > estimate. > So let me take you through a few points: > > Using a post PAR estimate will allow XPower to have an accurate estimate > of > capacitance load on the internal routes so no problem here. If you are > using post MAP > where no SDF is generated then this is a large source of inaccuracy and > is not > recommended. > > Now lets look at the timing simulations tend to result in glitches. This > switching translates > into higher activity rates in XPower-> higher power. > > I would expect these to be fairly low load signals. Also if you have a > fully synchronous > design this effect will be limited. > > Your clocks will be set correctly (high power consuming nets). > If you have met timing (verifed through timing analyser) then other > heavy loaded signals like > clock enables, should be set correctly. > > So in summary, if your design is post PAR, fully synchronous and has met > timing, you should > be OK an get an accurate power estimate. > > John > > praveen wrote: > > > hi all, > > > > i am calculating the power consumption using xilinx xpower. For > > generating the VCD file i am not loading the SDF(Standard Delay > > Format) during VSIM. Will it affect the power calculation. > > > > thanks in advance.
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