R: Interfacing SJA1000 to ISA bus

> But are address/data multiplexed?
>

Yes, SJA1000 multiplex address and data;

I solved the problem reserving 2 specific address inPC io space: one for
address and one for data:
when the pc data bus contain address for SJA1000 i haven't to generate rd/wr
signals (and this isn't a problem), but i have to generate AEN used by the
SJA1000 to catch the address, and thats's the problem!;
When the pc data bus contain data for SJA1000 i have to generate rd/wr
signals (this isn't a problem), ant at the end or the read/write cycle i
have to rise up AEN
I think that is'n possible use ISA ALE signal because i think that this line
switch on every I/O cycle.Is it correct?

Thank's

Massimo