Re: Arithmetics with carry

Followup to:  <[EMAIL PROTECTED]>
By author:    "Glen Herrmannsfeldt" <[EMAIL PROTECTED]>
In newsgroup: comp.arch.fpga
> 
> This is true, except for generating the flags on the final add.  Well, you
> can either generate all the flags, or only the signed or unsigned flags.
> For the intermediate adds only the carry, or lack of carry, from the high
> bit is important.  To detect signed overflow or underflow (more negative
> than can be represented) requires comparing the carry into and out of the
> sign bit.
> 

It depends.  Some architectures define CF=0 to mean borrow-out from a
subtraction.  Under that definition (used by the PDP-11, for example),
SUB is equivalent to NEG + ADD (a desirable property in my opinion);
under the "other" definition (as used by among others Intel processors
ever since the 4004), SUB ends up producing the opposite carry from
NEG+ADD.

        -hpa
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