Re: Arithmetics with carry

"H. Peter Anvin" <[EMAIL PROTECTED]> wrote in message
news:[EMAIL PROTECTED]
> Followup to:  <[EMAIL PROTECTED]>
> By author:    [EMAIL PROTECTED] (Kevin Becker)
> In newsgroup: comp.arch.fpga
> >
> > I'm designing a processor for one specific application and in my
> > software I have need a counter. I have a problem figuring out how to
> > make Add-with-carry work for this.

(snip)

> No, you're not correct.  What you're doing wrong is simply failing to
> recognize the fundamental reason why 2's complement is so ubiquitous:
>
> ADDITION AND SUBTRACTION OF 2'S COMPLEMENT NUMBERS IS IDENTICAL TO
> THE SAME OPERATIONS ON UNSIGNED NUMBERS
>
> Therefore, you don't care if you got overflow or underflow -- they are
> both represented by carry out.
>
> In other words, build your ALU just as if "v" and "i" were unsigned
> numbers, and everything is good.

This is true, except for generating the flags on the final add.  Well, you
can either generate all the flags, or only the signed or unsigned flags.
For the intermediate adds only the carry, or lack of carry, from the high
bit is important.  To detect signed overflow or underflow (more negative
than can be represented) requires comparing the carry into and out of the
sign bit.

-- glen