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"Kevin Becker" <[EMAIL PROTECTED]> wrote in message news:[EMAIL PROTECTED] > I'm designing a processor for one specific application and in my > software I have need a counter. I have a problem figuring out how to > make Add-with-carry work for this. > > I want to do v := v + i. > v and i are both 32 bit values, my ALU is 16 bits wide. > Everything is 2-complement. > > I would add the lower 16 bits, then add the higher 16 bits with carry. > My problem: "i" may be positive or negative, so there are 3 things > that can occur: > - overflow > - underflow > - none of those When after you add the low halfwords, you either get a carry or you don't. That is used as carry in for the high halfword add. > If I have only one carry bit, those 3 possibilities cannot be > represented. Am I right that in such an architecture it is impossible > to achieve what I want? How do I have to change my ALU in order to do > that? And how do I handle the sign bits in the "middle" of the 32 bit > values? If possible, I would like to avoid an additional comparison > and use only flags. After the high halfword add, you compare the carry out to the carry out of the sign bit to the carry in of the sign bit. If they are different then it is overflow or underflow. The value of such bit tells you which one. -- glen
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